Edge IP Solution

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Introducing Edge IP Solution

TTTech Industrial’s Edge IP Solution offers a simple way to add TSN (Time Sensitive Networking) Ethernet functionality to industrial devices. Edge IP Solution includes IP core and associated software for fast and easy integration onto your FPGA – enabling open, standard deterministic switching functionality. An Edge IP Solution reference design is available for TTTech Industrial’s Evaluation Board.

Edge IP Solution is part of the Slate product line, which provides a comprehensive platform for OPC UA over TSN networks. These products allow the user to focus on the application, whilst Slate deals with everything below the surface.

TSN Switch Features

IEEE 802.1Qbv
Time Aware Shaping

Provides guaranteed communication latency for time-critical traffic over standard Ethernet even in a converged infrastructure.

IEEE 802.1AS
Time Synchronization

Profile of IEEE 1588v2 for synchronization of clocks in the network. Supports timing requirements for scheduled TSN networks.

IEEE 802.1Qcc
SRP Enhancements

Defines the interfaces for central configuration of TSN networks. Supports configuration models for dynamic scheduling of TSN.

IEEE 802.1Qbu
Frame Preemption

Allows for optimal bandwidth utilization of non-scheduled background traffic sent in parallel with scheduled traffic.

IEEE 802.1CB
Seamless Redundancy

Enables seamless redundancy for increased network availability. Allows for redundancy on a per stream basis for individual critical streams.

Getting Started

Evaluation Board

The Evaluation Board is designed to be used in combination with TTTech Industrial’s Edge IP Solution, providing a stable hardware platform for integration and evaluation of TSN Ethernet functionality.

An Edge IP Solution reference design offers a ready to use software environment for the Evaluation Board.

Evaluation Board Flyer

Edge PTP

The Edge PTP stack provides highly accurate clock synchronization for TSN networks. It implements the IEEE 1588 Precision Time Protocol and IEEE 802.1AS to enable the synchronization of real-time clocks across the network within a nanosecond range.

The stack has been optimized to work seamlessly with TTTech Industrial’s Edge IP Solution but is also portable to other devices and operating systems.

Edge PTP Flyer

Technical Specifications

  • Ports
    • 3 to 5 ports; 10/100/1000 Mbit/s
  • Target device
    • Intel Cyclone V (SoC), Intel Arria 10 (SoC)
  • Physical interfaces
    • MII, GMII, DMA for host
    • PPS (Pulse-Per-Second) output
    • Avalon slave interface for management register access
  • Supported Ethernet interfaces
    • MII, GMII, RMII, RGMII, SGMII
    • 100BASE-FX, 1000BASE-X
  • TSN
    • IEEE 802.1AS-2020 Time Synchronization
    • IEEE 802.1Qbv Time Aware Shaping
    • IEEE 802.1Qbu Frame Preemption
    • IEEE 802.1CB Frame Replication and Elimination for Reliability
  • IEEE 802.1Q
    • Port-based VLAN classification
    • Assignment to traffic class on ingress ports
    • Support for credit-based shaper (CBS)
  • Clock synchronization
    • IEEE 802.1AS-2020 (multi-time domain support)
    • IEEE 1588-2019 one step end-to-end transparent clock support
  • Configuration
    • NETCONF 1.0/1.1 (RFC 6241) including derived YANG models
    • - IEEE 802.1Qbv Time Aware Shaping
    • - IEEE 802.1Qbu Frame Preemption
    • - IEEE 802.1Qcp Bridges and Bridged Networks (VLAN support)
    • SNMP v1/v2/v3 (RFC 3416) including MIB
  • Switching engine
    • Store and forward architecture providing full cross-sectional bandwidth
    • 128-512 kbit frame buffer per port
    • 4096 VLANs, up to 64 MSTIs
    • 16 MAC address filters per port
    • Up to 4096 entry MAC address hash based learning table
    • Up to 4096 policers per port
    • 8 traffic shapers per port (optional)
    • Static configuration of MAC addresses
    • Flow identification based MAC addresses
    • Ingress rate-limiting on a per-port basis for unicast, multicast, and broadcast traffic
  • Operating system
    • Linux Kernel 4.14 LTS (optional real-time patch)
    • Support for Linux net_dev, switch_dev, and PHC (PTP hardware clock)
  • Embedded software
    • Linux kernel module
    • Native Linux interfaces / user space configuration library
    • Edge PTP in binary format for ARM – for IEEE 1588 / IEEE 802.1AS clock synchronization
    • MSTP including additions for engineered traffic (802.1Qcc)
    • Open source support for SNMP and NETCONF